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1 for more information www.linear.com/LTC7001 typical applicat ion features description fast 150v high side nmos static switch driver the lt c ? 7001 is a fast high side n-channel mosfet gate driver that operates from input voltages up to 135v. it contains an internal charge pump that fully enhances an external n-channel mosfet switch, allowing it to remain on indefinitely. its powerful driver can easily drive large gate capacitances with very short transition times, making it well suited for both high frequency switching applications or static switch applications that require a fast turn-on and/or turn-off time. the LTC7001 is available in the thermally enhanced 10- lead msop package. high voltage, high side switch with 100% duty cycle LTC7001 driving a 1nf capacitive load n wide operating v in : up to 135v (150v abs max) n 1 pull-down, 2.2 pull-up for fast turn-on and turn-off times with 35ns propagation delays n internal charge pump for 100% duty cycle n adjustable turn-on slew rate n gate driver supply from 3.5v to 15v n adjustable v in overvoltage lockout n adjustable driver supply v cc undervoltage lockout n cmos compatible input n thermally enhanced, high voltage capable 10-lead msop package applications n static switch driver n load and supply switch driver n electronic valve driver n high frequency high side gate driver all registered trademarks and trademarks are the property of their respective owners. v in 0v to 135v v cc 3.5v to 15v lt c7001 7001fb tgup tgdn ts LTC7001 v ccuv v cc 0.1f 10ns/div v inp 7001 ta01a 2v/div v tg-ts 5v/div 7001 ta01b load 0v to 135v ovlo gnd inp on off bst
2 for more information www.linear.com/LTC7001 pin configuration absolute maximum ratings supply voltages bst-ts ................................................... C 0.3v to 15v v cc ......................................................... C 0.3v to 15v ts voltage .................................................. C 6v to 150v bst voltage ............................................ C 0.3v to 150v inp voltage ................................................... C 6v to 15v driver outputs tgup, tgdn ............................... (note 6) v ccuv voltage ................................................ C 0.3 to 6v ovlo voltage .............................................. C 0.3v to 6v operating junction temperature range (notes 2, 3, 4) lt c7001 e, lt c7001 i, ........................ C 40 c to 125 c lt c7001 h, ......................................... C 40 c to 150 c lt c7001 mp ....................................... C 55 c to 150 c storage temperature range .................. C 65 c to 150 c lead temperature (soldering, 10 sec) msop package ................................................. 300 c (note 1) order information lead free finish tape and reel part marking* package description temperature range LTC7001emse#pbf LTC7001emse#trpbf ltgxd 10-lead plastic msop C40c to 125c LTC7001imse#pbf LTC7001imse#trpbf ltgxd 10-lead plastic msop C40c to 125c LTC7001hmse#pbf LTC7001hmse#trpbf ltgxd 10-lead plastic msop C40c to 150c LTC7001mpmse#pbf LTC7001mpmse#trpbf ltgxd 10-lead plastic msop C55c to 150c consult ltc marketing for parts specified with wider operating temperature ranges. *temperature grades are identified by a label on the shipping container. for more information on lead free part marking, go to: http: //www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http: //www.linear.com/tapeandreel/. some packages are available in 500 unit reels through designated sales channels with #trmpbf suffix. 1 2 3 4 5 v cc v ccuv gnd inp ovlo 10 9 8 7 6 nc bst ts tgup tgdn top view mse package 10-lead plastic msop 11 gnd t jmax = 150c, ja = 45c /w, jc = 10c/w exposed pad (pin 11) is gnd, must be soldered to pcb symbol parameter conditions min typ max units input supplies ts operating voltage range 0 135 v v cc supply current (note 5) on mode sleep mode v bst-ts = 13v v inp ?=?4v v inp ?=?0.4v 27 27 50 50 a a http://www.linear.com/product/LTC7001#orderinfo the l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at t a = 25c (note 2). v cc ?=?v bst ?=?10v, v ts ?=?gnd?=?0v , unless otherwise noted. electrical characteristics lt c7001 7001fb
3 for more information www.linear.com/LTC7001 electrical characteristics the l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at t a = 25c (note 2). v cc ?=?v bst ?=?10v, v ts ?=?gnd?=?0v , unless otherwise noted. symbol parameter conditions min typ max units v cc uvlo v cc undervoltage lockout v ccuv = open v cc rising v cc falling hysteresis v ccuv = 0v v cc rising v cc falling hysteresis v ccuv = 1.5v v cc rising v cc falling hysteresis l l l l 6.5 5.8 3.1 2.8 9.7 9.1 7.0 6.4 600 3.5 3.2 300 10.5 9.9 600 7.5 6.9 3.7 3.4 10.9 10.3 v v mv v v mv v v mv bootstrapped supply (bst-ts) v bst-ts v tg above v ts with inp?=?3v (dc) v cc ?=?v ts ?=?7v, i bst ?=?0a v cc ?=?v ts ?=?10v, i bst ?=?0a v ts ?=?135v, i bst ?=?0a l l 9 10 10 11 12 12 14 14 14 v v v charge pump output current v ts ?=?20v, v bst-ts ?=?10v l C15 C30 a bst-ts floating uvlo v bst-ts rising v bst-ts falling 3.1 2.8 v v output gate driver (tg) tg pull-up resistance v cc ?=?v bst ?=?12v l 2.2 7 tg pull-down resistance v cc ?=?v bst ?=?12v l 1 4 t r output rise time 10% to 90%, cl?=?1nf 10% to 90%, cl?=?10nf 13 90 ns ns t f output fall time 10% to 90%, cl?=?1nf 10% to 90%, cl?=?10nf 13 40 ns ns t plh t phl input to output propagation delay v inp rising, cl?=?1nf v inp falling, cl?=?1nf l l 35 35 70 70 ns ns operation v ih v il input threshold voltages v inp rising v inp falling hysteresis l l 1.7 1.3 2 1.6 400 2.2 1.8 v v mv input pull-down resistance v inp ?=?1v 1 m ovlo pin threshold voltage rising falling hysteresis 1.16 1.05 1.21 1.10 110 1.26 1.15 v v mv ovlo pin leakage current v ovlo = 1.3v C100 0 100 na v vccuv pull-up current v vccuv = 1v C11.3 C10 8.7 a note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the LTC7001 is tested under pulsed load conditions such that t j ??t a . the LTC7001 e is guaranteed to meet performance specifications from 0c to 85c. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the LTC7001i is guaranteed over the C40c to 125c operating junction temperature range, the LTC7001h is guaranteed over the C40c to 150c operating junction temperature range and the LTC7001mp is tested and guaranteed over the C55c to 150c operating junction temperature range. high junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125c. note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. lt c7001 7001fb
4 for more information www.linear.com/LTC7001 electrical characteristics typical performance characteristics v cc supply current vs v cc supply voltage driver on resistance vs v bst-ts voltage input threshold voltage vs v cc supply voltage charge pump no-load output voltage vs v ts charge pump load regulation charge pump output current vs v ts t a = 25c , unless otherwise noted. note 3: the junction temperature (t j , in c) is calculated from the ambient temperature (t a , in c) and power dissipation (p d , in watts) according to the formula: t j = t a + (p d ? ja ), where ja is 45c / w. note 4: this ic includes over temperature protection that is intended to protect the device during momentary overload conditions. the maximum rated junction temperature will be exceeded when this protection is active. operation above the specified absolute maximum operating junction temperature may impair device reliability or permanently damage the device. note 5: dynamic supply current is higher due to the gate charge being delivered at the switching frequency. see applications information. note 6: do not apply a voltage or current source to these pins. they must be connected to capacitive loads only; otherwise permanent damage may occur. lt c7001 7001fb voltage (v) 0 28 56 84 112 140 ?45 ?35 ?25 ?15 3 ?5 5 i bst (a) 7001 g6 v cc = 4v v ts = 4v v ts = 6v v ts = 8v 6 v ts = 10v v ts = 12v i bst (a) 0 ?20 ?40 ?60 ?80 ?1 1 9 3 5 7 9 11 13 15 v bst -v ts (v) 7001 g05 12 15 0 10 20 30 v 40 50 v cc supply current (a) 7001 g01 v ccuv = 0v tgup tgdn v bst-ts (v) bst-ts 3 6 9 12 15 0 1 2 3 4 = 13v 5 6 r dson () 7001 g02 v in = v cc rising falling v v cc voltage (v) 3 6 9 12 15 0 0.5 ccuv 1.0 1.5 2.0 2.5 3.0 threshold voltage (v) 7001 g03 i bst = 0a v cc = 4v v cc = 5v = 0v v cc = 6v v cc = 7v v cc 8v v ts (v) 0 5 10 15 20 0 v 2 4 6 8 10 12 14 v bst - v ts (v) 7001 g04 v cc cc = 7v v bst-ts = 10v 25c 150c v ts (v)
5 for more information www.linear.com/LTC7001 typical performance characteristics ovlo threshold voltage vs temperature v ccuv lockout vs temperature driver on resistance vs temperature v cc supply current vs temperature input threshold voltage vs temperature v bst-ts floating uvlo voltage vs temperature t a = 25c , unless otherwise noted. pin functions v cc (pin 1): main supply pin. a bypass capacitor with a minimum value of 0.1f should be tied between this pin and gnd. v ccuv (pin 2): v cc supply undervoltage lockout. a resistor on this pin sets the reference for the gate drive undervoltage lockout. the voltage on this pin in the range of 0.5v to 1.5v is multiplied by seven to be the undervolt - age lockout for the gate drive (v cc pin). short to ground to set the minimum gate drive uvlo of 3.5v. leave open to set gate drive uvlo to 7.0v gnd (pin 3, exposed pad pin 11): ground. the exposed pad must be soldered to the pcb for rated electrical and thermal performance. inp (pin 4): input signal. cmos compatible input refer - ence to gnd that sets the state of tgdn and tgup pins (see applications information). inp has an internal 1m pull-down to gnd to keep tgdn pulled to ts during startup transients. lt c7001 7001fb 1.05 2.0 2.5 3.0 3.5 4.0 threshold voltage (v) 7001 g12 1.10 1.15 1.20 1.25 threshold voltage (v) 7001 g07 v ccuv = open rising rising falling temperature (c) ?50 0 50 100 150 5.0 5.5 falling 6.0 6.5 7.0 7.5 8.0 v ccuv lockout (v) 7001 g08 v temperature (c) bst?ts = 12v tgup tgdn temperature (c) ?50 0 50 100 150 ?50 0 1 2 3 4 resistance () 7001 g09 v in = 10v temperature (c) ?50 0 0 50 100 150 15 20 25 30 35 40 50 current (a) 7001 g10 v in = 10v rising falling temperature (c) ?50 0 100 50 100 150 0 0.5 1.0 1.5 2.0 2.5 3.0 150 threshold voltage (v) 7001 g11 rising falling temperature (c) ?50 0 50 100 150
6 for more information www.linear.com/LTC7001 block diagram 7001 bd ? + ? + ovlo (pin 5): overvoltage lockout input. connect to the input supply through a resistor divider to set the lockout level. a voltage on this pin above 1.21v causes tgdn to be pulled to ts. normal operation resumes when the voltage on this pin decreases below 1.11v. ovlo should be tied to gnd when not used. tgdn (pin 6): high current gate driver pull-down. this pin pulls down to ts. for the fastest turn-off, tie this pin directly to the gate of the external high side mosfet. tgup (pin 7): high current gate driver pull-up. this pin pulls up to bst. tie this pin to tgdn for maximum gate drive transition speed. a resistor can be connected between this pin and the gate of the external mosfet to control the inrush current during turn-on. see applications information. ts (pin 8): top (high side) source connection or gnd if used in ground referenced applications. bst (pin 9): high side bootstrapped supply. an external capacitor with a minimum value of 0.1f should be tied between this pin and ts. voltage swing on this pin is 12v to (v ts + 12v). nc (pin 10): no connect. this pin should be floated. pin functions lt c7001 7001fb ts nc tgup bst m1 c b 0.1 d1* load 1.21v 10a 2 2.3v ovlo inp gnd *optional v ccuv v in 135v abs max v cc 3.5v to 15v v cc 1m 5 pch nch 9 7 6 8 10 1 4 3 charge pump level shift up logic tgdn
7 for more information www.linear.com/LTC7001 operation the LTC7001 is designed to receive a ground-referenced, low voltage digital input signal, inp and quickly drive a high side n-channel power mosfet whose drain can be up to 150v above ground. the LTC7001 is capable of driv - ing a 1nf load using a 12v bootstrapped supply voltage (v bst C v ts ) with 35ns of propagation delay and fast rise/fall times. the high gate drive voltage reduces external power losses associated with external mosfet on-resistance. the strong drivers not only provide fast turn on and off times but hold the tgup and tgdn to ts voltages in the desired state in the presence of high slew rate transients which can occur driving inductive loads at high voltages. internal charge pump the LTC7001 contains an internal charge pump that enables the mosfet gate drive to have 100% duty cycle. the charge pump regulates the bst-ts voltage to 12v reducing external power losses associated with external mosfet on-resistance. the charge pump uses the higher voltage of ts or v cc as the source for the charge. protection circuitry when using the LTC7001 , care must be taken not to exceed any of the ratings specified in the absolute maximum ratings section. as an added safeguard, the LTC7001 incorporates an overtemperature shutdown feature. if the junction temperature reaches approximately 180c, the LTC7001 will enter thermal shutdown mode and tgdn will be pulled to ts. after the part has cooled below 160c, tgdn will be allowed to go back high. the overtemperature level is not production tested. the LTC7001 is guaranteed to start at temperatures below 150c. the LTC7001 additionally implements protection fea - tures which prohibit tgdn from going high when v cc or (v bst Cv ts ) are not within proper operating ranges. by using a resistive divider from v in to ground the ovlo pin can serve as a precise input supply voltage overvoltage lockout. tgdn is pulled to ts when ovlo rises above 1.21v , so ovlo can be configured to limit switching to a specific range on input supply voltages. v cc contains an undervoltage lockout feature that will pull tgdn to ts and is configured by the v ccuv pin. if v ccuv is open, tgdn is pulled to ts until v cc is greater than 7.0v. by using a resistor from v ccuv to ground, the rising undervoltage lockout on v cc can be adjusted from 3.5v to 10.5v. an additional internal undervoltage lockout is included that will pull tgdn to ts when the floating voltage from bst to ts is less than 3.1v (typical). (refer to block diagram) timing diagram 7001 td lt c7001 7001fb 10% v ih v il input (inp) output (tg-ts) input rise/fa ll time < 10ns t plh t r t phl t f 90%
8 for more information www.linear.com/LTC7001 applications information input stage the LTC7001 employs cmos compatible input thresholds that allow a low voltage digital signal connected to inp to drive standard power mosfets. the LTC7001 contains an internal voltage regulator which biases the input buffer connected to inp allowing the input thresholds (v ih ? = ? 2.0v, v il ? =? 1.6v) to be independent of variations in v cc . the 400mv hysteresis between v ih and v il eliminates false triggering due to noise events. however, care should be taken to keep inp from any noise pickup, especially in high frequency, high voltage applications. inp also contains an internal 1m pull-down resistor to ground, keeping tgdn pulled to ts during startup and other unknown transient events. inp has an absolute maximum of C6v to +15v which allows the signal driving inp to have voltage excursions outside the normal power supply and ground range. it is not uncommon for signals routed with long pcb traces and driven with fast rise/fall times to inductively ring to voltages higher than power supply or lower than ground. output stage a simplified version of the LTC7001 output stage is shown in figure?1. the pull-down device is an n-channel mosfet with a typical 1 r ds(on) and the pull-up device is a p-channel mosfet with a typical 2.2 r ds(on) . the pull-up and pull-down pins have been separated to allow the turn-on transient to be controlled while maintaining a fast turn-off. the LTC7001 powerful output stage (1 pull-down and 2.2 pull-up) minimizes transition losses when driving external mosfets and keeps the mosfet in the state com - manded by inp even if high voltage and high frequency transients couple from the power mosfet back to the driving circuitry. the large gate drive voltage on tgup and tgdn reduces conduction losses in the external mosfet because r ds(on) is inversely proportional to its gate overdrive (v gs ? C?v th ). external overvoltage lockout the ovlo pin can be configured as a precise overvoltage (ovlo) lockout on the v in supply with a resistive divider from v in to ground. a simple resistive divider can be used as shown in figure?2 to meet specific v in voltage require - ments. when ovlo is greater than 1.21v, tgdn will be pulled to ts and the external mosfet will be turned off. figure 1. simplified output stage figure 2. adjustable ov lockout 12v 7001 f01 + ? + ? 2.2 1 high speed 150v level shifter charge pump a v = 1 the current that flows through the? r4? C? r5 divider will directly add to the current drawn from v in and care should be taken to minimize the impact of this current on the overall current used by the application circuit. resistor values in the megaohm range may be required to keep the impact of the quiescent shutdown and sleep currents low. to pick resistor values, the sum total of? r4 ?+?r5 (r total ) should v in r4 r5 d5 7001 f02 ovlo lt c7001 7001fb LTC7001 bst tgup tgdn ts v cc inp 30a LTC7001
9 for more information www.linear.com/LTC7001 applications information be chosen first based on the allowable dc current that can be drawn from v in . the individual values of r4 and r5 can then be calculated from the following equations: r 5 = r t o t a l ? 1.21 v r i s i ng v i n o v lo thr e s hol d r 4 = r t o t a l C r 5 for applications that do not need a precise external ovlo the ovlo pin is required to be tied directly to ground. be aware that the ovlo pin cannot be allowed to exceed its absolute maximum rating of 6v . to keep the voltage on the ovlo pin from exceeding 6v , the following relationship should be satisfied: v i n ( m a x ) ? r 5 r 4 + r 5 ? ? ? ? ? ? < 6 v if the v in(max) relationship for the ovlo pin cannot be satisfied, an external 5v zener diode should also be placed from ovlo to ground in addition to any lockout setting resistors. bootstrapped supply (bst-ts) an external bootstrapped capacitor, c b , connected between bst and ts supplies the gate drive voltage for the mosfet driver. the LTC7001 keeps the bst-ts supply charged with an internal charge pump, allowing for duty cycles up to 100 %. when the high side external mosfet is to be turned on, the driver places the c b voltage across the gate-source of the mosfet. this enhances the high side mosfet and turns it on. the source of the mosfet, ts, rises to v in and the bst pin follows. with the high side mosfet on, the bst voltage is above the input supply; v bst ? =?v ts ?+? 12v . the boost capacitor, c b , supplies the charge to turn on the external mosfet and needs to have at least 10 times the charge to turn on the external mosfet fully. the charge to turn on the external mosfet is referred to gate charge, q g , and is typically specified in the external mosfet data sheet. gate charge can range from 5nc to hundreds ncs and is influenced by the gate drive level and the type of external mosfet used. for most applications, a capacitor value of 0.1f for c b will be sufficient. however, the following relationship for c b should be maintained: c b > 10 ? ex t e r na l m o s f et q g 1 v the internal charge pump that charges the bst-ts supply outputs approximately 30a to the bst pin. if the time to charge the external bootstrapped capacitor, c b from initial power-up with the internal charge pump is not sufficient for the application, a low reverse leakage external silicon diode, d1 with a reverse voltage rating greater than v in connected between v cc and bst should be used as shown in figure 3. an external silicon diode between v cc and bst should be used if the following relationship cannot be met: bst diode required if power-up to inp going high < c b s t ? 12 v 30 a ? 40 m s figure 3. external bst diode c b d1 v cc bst ts 7001 f03 another reason to use an external silicon diode between v cc and bst is if the external mosfet is switched at frequency so high that the bst-ts supply collapses. an external silicon diode between v cc and bst should be used if the following relationship cannot be met: bst diode required if switching frequency > 30 a 2 ? m o s f et q g ? 500 h z lt c7001 7001fb LTC7001
10 for more information www.linear.com/LTC7001 applications information a schottky diode should not be used between v cc and bst, because the reverse leakage of the schottky diode at hot will be more current than the charge pump can overcome. some example silicon diodes with low leakage include: ? mmbd1501 a, fairchild semiconductor ? cmpd3003, central semiconductor v cc undervoltage comparator the LTC7001 contains an adjustable undervoltage lockout (uvlo) on the v cc voltage that pulls tgdn to ts and can be easily programmed using a resistor (r vccuv ) between the v ccuv pin and ground. the voltage generated on v ccuv by r vccuv and the internal 10a current source set the v cc uvlo. the rising v cc uvlo is internally limited within the range of 3.5v and 10.5v. if v ccuv is open the rising v cc uvlo is set internally to 7.0v. the typical value of resistor for a particular rising v cc uvlo can be selected using figure?4 or the following equation: r v c c u v = r i s i ng v c c u v lo 70 a where 3.5v < rising vcc uvlo < 10.5v. mosfet selection the most important parameters in high voltage applications for mosfet selection are the breakdown voltage bv dss , on-resistance r ds(on) and the safe operating area, soa. the mosfet, when off, will see the full input range of the input power supply plus any additional ringing than can occur when driving an inductive load. external conduction losses are minimized when using low r ds(on) mosfets. since many high voltage mosfets have higher threshold voltages (typical v th ? ? 5v) and r ds(on) is directly related to the (v gs C v th ) of the mosfet, the LTC7001 maximum gate drive of greater than 10v makes it an ideal solution to minimize external conduction losses associated with external high voltage mosfets. soa is specified in typical characteristic curves in power n-channel mosfet data sheets. the soa curves show the relationship between the voltages and current allowed in a timed operation of a power mosfet without causing damage to the mosfet. limiting inrush current during turn-on large capacitive loads such as complex electrical systems with large bypass capacitors should be driven using the circuit shown in figure?5. the pull-up gate drive to the power mosfet from tgup is passed through an rc delay network, r g and c g , which greatly reduces the turn-on ramp rate of the mosfet. since the mosfet source volt - age follows the gate voltage, the load is powered smoothly from ground. this dramatically reduces the inrush current from the source supply and reduces the transient ramp rate of the load, allowing for slower activation of sensitive electrical loads. the turn-off of the mosfet is not affected by the r c delay network as the pull-down for the mosfet gate is directly from the tgdn pin. note that the voltage rating on capacitor c g needs to be the same or higher than the external mosfet and c load . figure 4. v ccuv resistor selection lt c7001 7001fb 150 180 210 240 0 1 2 3 4 5 rising v cc uvlo 6 7 8 9 10 11 v cc uvlo (v) 7000 f04 falling v cc uvlo v ccuv resistor to ground (k) 0 30 60 90 120
11 for more information www.linear.com/LTC7001 applications information adding c g to the gate of the external mosfet can cause high frequency oscillation. a low power, low ohmic value resistor (10) should be placed in series with c g to dampen the oscillations as shown in figure 5 whenever c g is used in an application. alternatively, the low ohmic value resistor can be placed in series with the gate of the external mosfet. figure 6. optional schottky diode usage when c g is added to the circuit in figure?5, the value of the bootstrap capacitor, c b , must be increased to be able to supply the charge to both to mosfet gate and capacitor c g . the relationship for c b that needs to be maintained when c g is used is given by: c b > 10 ? m o s f et q g 1 v + 10 ? c g optional schottky diode usage on ts when turning off a power mosfet that is connected to an inductive component (inductor, long wire or complex load), the ts pin can be pulled below ground until the current in the inductive component has completely discharged. the ts pin is tolerant of voltages down to C6v , however, an optional schottky diode with a voltage rating at least as high as the load voltage should be connected between ts and ground to prevent discharging the inductive through the ts pin of the LTC7001. see figure?6. figure 5. powering large capacitive loads the values for r g and c g to limit the inrush current can be calculated from the below equation: i i n _ r u s h ? 0.7 ? 12 v ? c l o a d r g ? c g for the values shown in figure?5 the inrush current will be : i i n _ r u s h ? 0.7 ? 12 v ? 100 f 100 k ? ? 0.047 f ? 180 m a correspondingly, the ramp rate at the load for the circuit in figure?5 is approximately: v l o a d t ? 0.7 ? 12 v r g ? c g ? 2 v / m s l1 tgup tgdn ts 7001 f06 m1a v in load d2 c b 1f c g 47nf 10 load bst ts tgup tgdn r g 100k 7001 f05 v in c load 100f lt c7001 7001fb LTC7001 LTC7001
12 for more information www.linear.com/LTC7001 figure 7. protecting load from voltage drops on v in tgup tgdn ts inp 7001 f07 m1a m1b v in load reverse input protection to protect the load from discharging back into v in when the external mosfet is off and the v in voltage drops below the load voltage, two external n-channel mosfets should be used and must be in a back-to-back arrangement as shown in figure?7. dual n-channel packages such as the vishay/siliconix si7956 dp are a good choice for space saving designs. pc board layout considerations 1. solder the exposed pad on the backside of the LTC7001 package directly to the ground plane of the board. 2. limit the resistance of the ts trace, by making it short and wide. 3. c b needs to be close to chip. 4. always include an option in the pc board layout to place a resistor in series with the gate of any external mosfet. high frequency oscillations are design dependent, and having the option to add a series dampening resistor can save a design iteration of the pc board. applications information lt c7001 7001fb LTC7001
13 for more information www.linear.com/LTC7001 typical applications high side switch with inrush control and ovlo high side switch with v ccuv and ovlo 4.7f 0.47f 220k load 15mf 0v to 60v 47f +1f tgup tgdn bst ts ovlo inp v cc v ccuv 7001 ta02 irfs4115pbf dfls1150 v in 0v to 60v (150v tolerant) v cc 7v to 15v on off gnd 590k 10 12.1k 0.1f load 0v to 100v tgup tgdn bst ts ovlo inp v ccuv v cc 7001 ta03 bsc12dn20ns3g v in 0v to 100v (150v tolerant) v cc 5v to 15v on off gnd 12.1k 976k 71.5k lt c7001 7001fb LTC7001 LTC7001
14 for more information www.linear.com/LTC7001 package description please refer to http://www.linear.com/product/LTC7001#packaging for the most recent package drawings. msop (mse) 0213 rev i 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ?0.27 (.007 ? .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 1 2 3 4 5 4.90 0.152 (.193 .006) 0.497 0.076 (.0196 .003) ref 8 9 10 10 1 7 6 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane 5.10 (.201) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 1.68 0.102 (.066 .004) 1.88 0.102 (.074 .004) 0.50 (.0197) bsc 0.305 0.038 (.0120 .0015) typ bottom view of exposed pad option 1.68 (.066) 1.88 (.074) 0.1016 0.0508 (.004 .002) detail ?b? detail ?b? corner tail is part of the leadframe feature. for reference only no measurement purpose 0.05 ref 0.29 ref mse package 10-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1664 rev i) lt c7001 7001fb
15 for more information www.linear.com/LTC7001 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 07/17 clarified second paragraph in the output surge section changed to zener from schottky diode (text and symbol) modified equation, updated figure 4 inp = 0 in figure 7, and wording update schematic clarification 9 9, 10 11 13 14 b 10/17 top mark corrected 2 lt c7001 7001fb
16 for more information www.linear.com/LTC7001 lt 1017 rev b ? printed in usa www.linear.com/LTC7001 linear technology corporation 2017 related parts typical application part number description comments ltc7000/ltc7000-1 fast 150v protected high side nmos static switch driver 3.5v to 150v operation, short-circuit protected, v sns = 30mv, i q = 35a , turn-on (c l = 1nf) = 35ns, internal charge pump ltc4440/ltc4440-5/ ltc4440a-5 high speed, high voltage high side gate driver up to 100v supply voltage, 8v v cc 15v, 2.4a peak pull-up/1.5 peak pull-down ltc7138 high efficiency, 150v 250ma/400ma synchronous step-down regulator integrated power mosfets, 4v v in 150v, 0.8v v out v in , i q = 12a, msop-16 (12) ltc7103 105v, 2.3a low emi synchronous step-down regulator 4.4v v in 105v, 1v v out v in , i q = 2a fixed frequency 200khz to 2mhz, 5mm 6mm qfn ltc7801 150v low i q , synchronous step-down dc/dc controller 4v v in 140v, 150v abs max, 0.8v v out 60v, i q = 40a, pll fixed frequency 320khz to 2.25mhz lt1910 protected high side mosfet driver 8v to 48v operation, v sns ?=?65mv, i q ?=?110a , turn-on (cl?=?1nf)?=?220s, internal charge pump ltc4367 100v overvoltage, undervoltage and reverse supply protection 2.5v v in 60v, v out protection up to 100v, reverse protection to C40v, msop-8, 3mm 3mm dfn-8 ltc4368 100v overvoltage, undervoltage and revernse protection controller with bidirectional circuit breaker 2.5v v in 60v, v out protection up to 100v, reverse protection to C40v, msop-8, 3mm 3mm dfn-8 ltc4364 surge stopper with ideal diode 4v to 80v operation, v sns ?=?50mv, i q ?=?425a , turn-on (cl?=?1nf)?=?500s, internal charge pump ltc7860 high efficiency switching surge stopper 4v to 60v operation, v sns ?=?95mv, i q ?=?370a, pmos driver ltc4231 micropower hot swap controller 2.7v to 36v operation, v sns ?=?50mv, i q ?=?4a , turn-on (cl?=?1nf)?=?1ms, internal charge pump ltc3895 150v low i q , synchronous step-down dc/dc controller pll fixed frequency 50khz to 900khz, 4v v in 140v, 0.8v??v out ??60v, i q ?=?40a ltc4380 low quiescent current surge stopper 4v to 80v operation, v sns ? =?50mv, i q ?=?8a , turn-on?=?5ms, internal charge pump ltc3639 high efficiency, 150v 100ma synchronous step-down regulator integrated power mosfets, 4v v in 150v, 0.8v??v out ??v in , i q ?=?12a, msop-16(12) motor driver 86.6k vs-12cwq10fn tgup tgdn ts v ccuv v cc bst ovlo inp 7001 ta04 bsc252n10ns v cc 6v to 15v pwm - 20khz cmpd3003 0.1f 48v gnd 48v, 500w motor m lt c7001 7001fb LTC7001

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